By Ricardo Reis, Yu Cao, Gilson Wirth
This ebook offers actual knowing, modeling and simulation, on-chip characterization, structure recommendations, and layout concepts which are potent to augment the reliability of varied circuit devices. The authors supply readers with innovations for state-of-the-art and destiny applied sciences, starting from expertise modeling, fault detection and research, circuit hardening, and reliability management.
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Extra resources for Circuit Design for Reliability
45 3. G Wirth, R da Silva, P Srinivasan, J Krick and R Brederlow. “Statistical model for MOSFET low-frequency noise under cyclo-stationary conditions” Int Electron Dev Meeting - IEDM 2009, p. 1-4, (2009). 4. , 90, p. 435–41 (2008). 5. R da Silva, G Wirth and L Brusamarello. “An appropriate model for the noise power spectrum produced by traps at the Si SiO interface: a study of the influence of a time-dependent Fermi level. Journal of Statistical Mechanics” Journal of Statistical Mechanics. Theory and Experiment, 2008, p.
Please refer to equation 9 in . The result for this limit is valid for any kind of periodic excitation. This is the limit studied in [11, 13]. However, for this limit, we obtain the same result in a much simpler derivation than in [11, 13], and without making any further assumption or simplification. The single assumption is that the transition probabilities dt/£e (t) and dt/£c (t) are much smaller than the excitation period T. 9) are a generalization of the Machlup formulation for cyclo-stationary RTN with excitation frequency higher than the noise frequency.
15 Behavior of slow traps under square wave excitation. Steady increase of VT is seem, causing a BTI degradation which follows a log(t) behavior. Dotted (blue) line is detailed Monte Carlo simulation, considering usual time constants. Solid (red) line is Monte Carlo simulation using equivalent time constants, as given by Eqs. 14) (blue) line is the result of the detailed MC simulation of the square wave excitation, applying the usual time constants during the stress (on) and recovery (off ) phases.
Circuit Design for Reliability by Ricardo Reis, Yu Cao, Gilson Wirth